Ruben Vermeersch
194 lines
3.2 KiB
ArmAsm
194 lines
3.2 KiB
ArmAsm
// +build amd64,!gccgo,!appengine,!nacl
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#include "textflag.h"
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#define Dst DI
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#define A R8
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#define B R9
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#define N R12
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// func xorBytesSSE(dst, a, b []byte, n int)
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TEXT ·xorBytesSSE(SB), NOSPLIT, $0
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MOVQ dst_data+0(FP), Dst
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MOVQ a_data+24(FP), A
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MOVQ b_data+48(FP), B
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MOVQ n+72(FP), N
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XOR_LOOP_64_SSE:
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CMPQ N, $64
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JB XOR_LOOP_16_SSE
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MOVOU 0*16(A), X0
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MOVOU 1*16(A), X1
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MOVOU 2*16(A), X2
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MOVOU 3*16(A), X3
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MOVOU 0*16(B), X4
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MOVOU 1*16(B), X5
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MOVOU 2*16(B), X6
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MOVOU 3*16(B), X7
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PXOR X4, X0
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PXOR X5, X1
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PXOR X6, X2
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PXOR X7, X3
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MOVOU X0, 0*16(Dst)
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MOVOU X1, 1*16(Dst)
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MOVOU X2, 2*16(Dst)
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MOVOU X3, 3*16(Dst)
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ADDQ $64, A
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ADDQ $64, B
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ADDQ $64, Dst
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SUBQ $64, N
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JNZ XOR_LOOP_64_SSE
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RET
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XOR_LOOP_16_SSE:
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CMPQ N, $16
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JB XOR_LOOP_FINAL_SSE
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MOVOU (A), X0
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MOVOU (B), X1
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PXOR X1, X0
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MOVOU X0, (Dst)
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ADDQ $16, A
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ADDQ $16, B
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ADDQ $16, Dst
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SUBQ $16, N
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JNZ XOR_LOOP_16_SSE
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RET
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XOR_LOOP_FINAL_SSE:
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MOVB (A), AL
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MOVB (B), BL
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XORB AL, BL
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MOVB BL, (Dst)
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INCQ A
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INCQ B
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INCQ Dst
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DECQ N
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JNZ XOR_LOOP_FINAL_SSE
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RET
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// func xorBytesAVX2(dst, a, b []byte, n int)
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TEXT ·xorBytesAVX2(SB), NOSPLIT ,$0
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MOVQ dst_data+0(FP), Dst
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MOVQ a_data+24(FP), A
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MOVQ b_data+48(FP), B
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MOVQ n+72(FP), N
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XOR_LOOP_256_AVX:
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CMPQ N, $256
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JB XOR_LOOP_128_AVX
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VMOVDQU 0*32(A), Y0
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VMOVDQU 1*32(A), Y1
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VMOVDQU 2*32(A), Y2
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VMOVDQU 3*32(A), Y3
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VMOVDQU 4*32(A), Y4
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VMOVDQU 5*32(A), Y5
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VMOVDQU 6*32(A), Y6
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VMOVDQU 7*32(A), Y7
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VPXOR 0*32(B), Y0, Y0
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VPXOR 1*32(B), Y1, Y1
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VPXOR 2*32(B), Y2, Y2
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VPXOR 3*32(B), Y3, Y3
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VPXOR 4*32(B), Y4, Y4
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VPXOR 5*32(B), Y5, Y5
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VPXOR 6*32(B), Y6, Y6
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VPXOR 7*32(B), Y7, Y7
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VMOVDQU Y0, 0*32(Dst)
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VMOVDQU Y1, 1*32(Dst)
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VMOVDQU Y2, 2*32(Dst)
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VMOVDQU Y3, 3*32(Dst)
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VMOVDQU Y4, 4*32(Dst)
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VMOVDQU Y5, 5*32(Dst)
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VMOVDQU Y6, 6*32(Dst)
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VMOVDQU Y7, 7*32(Dst)
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ADDQ $256, A
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ADDQ $256, B
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ADDQ $256, Dst
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SUBQ $256, N
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JNZ XOR_LOOP_256_AVX
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RET
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XOR_LOOP_128_AVX:
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CMPQ N, $128
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JB XOR_LOOP_64_AVX
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VMOVDQU 0*32(A), Y0
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VMOVDQU 1*32(A), Y1
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VMOVDQU 2*32(A), Y2
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VMOVDQU 3*32(A), Y3
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VPXOR 0*32(B), Y0, Y0
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VPXOR 1*32(B), Y1, Y1
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VPXOR 2*32(B), Y2, Y2
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VPXOR 3*32(B), Y3, Y3
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VMOVDQU Y0, 0*32(Dst)
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VMOVDQU Y1, 1*32(Dst)
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VMOVDQU Y2, 2*32(Dst)
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VMOVDQU Y3, 3*32(Dst)
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ADDQ $128, A
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ADDQ $128, B
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ADDQ $128, Dst
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SUBQ $128, N
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JNZ XOR_LOOP_128_AVX
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RET
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XOR_LOOP_64_AVX:
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CMPQ N, $64
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JB XOR_LOOP_16_AVX
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VMOVDQU 0*32(A), Y0
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VMOVDQU 1*32(A), Y1
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VPXOR 0*32(B), Y0, Y2
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VPXOR 1*32(B), Y1, Y3
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VMOVDQU Y2, 0*32(Dst)
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VMOVDQU Y3, 1*32(Dst)
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ADDQ $64, A
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ADDQ $64, B
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ADDQ $64, Dst
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SUBQ $64, N
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JNZ XOR_LOOP_64_AVX
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RET
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XOR_LOOP_16_AVX:
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CMPQ N, $16
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JB XOR_LOOP_FINAL_AVX
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MOVOU (A), X0
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VPXOR (B), X0, X1
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VMOVDQU X1, (Dst)
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ADDQ $16, A
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ADDQ $16, B
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ADDQ $16, Dst
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SUBQ $16, N
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JNZ XOR_LOOP_16_AVX
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RET
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XOR_LOOP_FINAL_AVX:
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MOVB (A), AL
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MOVB (B), BL
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XORB AL, BL
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MOVB BL, (Dst)
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INCQ A
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INCQ B
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INCQ Dst
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DECQ N
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JNZ XOR_LOOP_FINAL_AVX
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RET
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#undef Dst
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#undef A
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#undef B
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#undef N
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